Friday, March 16, 2012

Working of a basic sequential circuit



In this article we will explain how a basic sequential circuit works and how its output is dependent on the previous inputs.Consider the figure below




In the figure we have two NOR gate connected such that the output of one NOR gate becomes one of the input of the other gate. The two inputs R and S are the primary inputs and can be changed when we need. But this circuit shown above is not a practical one because it has no delay. In real world every nor gate will be associated with some delay . The diagram along with delay is shown in figure below.



Here the two gates have a delay of “d”. Their outputs x and y becomes X and Y after a delay of d. By the examination of equivalent circuit we found that the output x and y follow changes in input R,S,X and Y instantaneously. From this observation we write the combinatorial relationships as



X and Y are nothing but x and y delayed for some time. So we can write

X(t) =x(t-d) Y(t) =y(t-d)

We can represent x and y (eq.1) in K-maps as shown below.







For simplicity we combine the two k-map into one as shown below.






With K-map we cannot find the sequence of events ,but we can find out the state of the circuit at a particular time using K-Map. Ie we can determine what happens after a time delay d just by saying X becomes x and Y becomes y after a time delay d.

The circuit is stable when x= X and y=Y. In all other cases the circuit is unstable and further changes must be take place to make the circuit stable . In a K- map stable states can be identified by comparing the XY values of each row and the entries of xy in the same row.

Sequence of events or cycles by which the sequential switching circuit come to a stable state.

Consider that the circuit is in a unstable condition where RS= 10 and XY =11 (4th column 3rd row). We can see that the value of xy at this position 00 and is not equal to the value of XY. But XY assumes the value of xy(as it is given as feed back) after some time and now becomes 00. So our point of attention moves to 4th column 1st row . Here also its unstable since xy =01 and is not equal to XY. So after some time XY becomes 01 and our point of attention moves to 2nd row 1st column. Here xy = 01 which is equal to XY . This is a stable situation.

Proving that sequential switching circuit exhibit memory.

When the primary input RS has value 00 it can assume two stable states where XY=01(A) or 10 (B). But what was RS before it became 00. It could have been 01 or 10 from which they changed one digit to become 00.

Suppose that RS was equal to 01 and the circuit was in stable state C. We now make S=0 making RS=00 making us move to the first column to reach the stable state B.

Suppose RS was equal to to 10 and the circuit was in stable state E. We now make R=0 making RS=00 making us move to the first column to reach the stable state A.

Thus we clearly prove that sequential switching circuit ie it outputs depend on previous inputs.

Thursday, March 15, 2012

Oscillatory and Bistable output


Consider three inverters connected like in the figure. The output is fed back to the input. This circuit has no primary inputs. To understand the working of the loop consider that at t=0 there is a noise induced dynamic '1'. This will propagate through the gates and give an output of dynamic 0 at t= 2t1 + t2 . T1 and t2 are propagation delays of the gates. This will go on endlessly. Thus the output of any gate will be oscillatory. An oscillatory output is also called unstable.





If we have even number of gates we can be see that the output can only be 0 or 1

Sequential switching circuit



In a NAND gate when the input threshold voltage crosses in the positive direction the output will cross the threshold voltage in the negative direction without any delay in a ideal circuit. But in practical circuits the output will lag the input by some time. See the graph below


In the graph we can see that there is a time delay of t1 between the input and output when the when input crosses the positive threshold and the output crossing the negative threshold. Also we can see that there is a time delay of t2 between the negative transition of input and positive transition of output.

The transition of logic level from 0 to 1 is called dynamic 1 and the downward transition of 1 to 0 is called dynamic 0.